/*
 * LoRa.h
 *
 *  Created on: May 30, 2020
 *      Author: gary
 */

#ifndef INC_LORA_H_
#define INC_LORA_H_

#include "main.h"
#include "spi.h"
#include "gpio.h"
#include "usart.h"
#include "stm32f0xx_it.h"

//#define LoRa_Callback

// registers
#define REG_FIFO                 0x00
#define REG_OP_MODE              0x01
#define REG_FRF_MSB              0x06
#define REG_FRF_MID              0x07
#define REG_FRF_LSB              0x08
#define REG_PA_CONFIG            0x09
#define REG_LR_OCP				 0X0b
#define REG_LNA                  0x0c
#define REG_FIFO_ADDR_PTR        0x0d
#define REG_FIFO_TX_BASE_ADDR    0x0e
#define REG_FIFO_RX_BASE_ADDR    0x0f
#define REG_FIFO_RX_CURRENT_ADDR 0x10
#define REG_IRQ_FLAGS            0x12
#define REG_RX_NB_BYTES          0x13
#define REG_PKT_RSSI_VALUE       0x1a
#define REG_PKT_SNR_VALUE        0x1b
#define REG_MODEM_CONFIG_1       0x1d
#define REG_MODEM_CONFIG_2       0x1e
#define REG_PREAMBLE_MSB         0x20
#define REG_PREAMBLE_LSB         0x21
#define REG_PAYLOAD_LENGTH       0x22
#define REG_MODEM_CONFIG_3       0x26
#define REG_RSSI_WIDEBAND        0x2c
#define REG_DETECTION_OPTIMIZE   0x31
#define REG_DETECTION_THRESHOLD  0x37
#define REG_SYNC_WORD            0x39
#define REG_DIO_MAPPING_1        0x40
#define REG_VERSION              0x42
#define REG_PaDac				 0x4d//add REG_PaDac

// modes
#define MODE_LONG_RANGE_MODE     0x80
#define MODE_SLEEP               0x00
#define MODE_STDBY               0x01
#define MODE_TX                  0x03
#define MODE_RX_CONTINUOUS       0x05
#define MODE_RX_SINGLE           0x06

// PA config
#define PA_BOOST                 0x80
#define RFO                      0x70
// IRQ masks
#define IRQ_TX_DONE_MASK           0x08
#define IRQ_PAYLOAD_CRC_ERROR_MASK 0x20
#define IRQ_RX_DONE_MASK           0x40

#define MAX_PKT_LENGTH           255

#define PA_OUTPUT_PA_BOOST_PIN  1
#define PA_OUTPUT_RFO_PIN       0

#define IMPLICIT_HEADER_MODE		1
#define EXPLICIT_HEADER_MODE		0

typedef struct __LoRaSettingsTypedef
{
	uint32_t frequency;
	int packetIndex;
	int implicitHeaderMode;
} LoRaSettingsTypedef;

uint8_t LoRa_readRegister(uint8_t address);
void LoRa_writeRegister(uint8_t address, uint8_t value);
uint8_t LoRa_init(uint32_t frequency, uint8_t boost);
void LoRa_lowDataRateOptimize(uint8_t status);
void LoRa_end();
void LoRa_beginPacket(uint8_t implicitHeader);
void LoRa_endPacket();
uint8_t LoRa_parsePacket(uint8_t headerMode);
uint8_t LoRa_packetRssi();
uint8_t LoRa_packetSnr();
uint8_t LoRa_writeFifoByte(uint8_t data);
uint8_t LoRa_writeFifoBytes(const uint8_t *buffer, uint8_t size);
uint8_t LoRa_available();
uint8_t LoRa_readFifo();
uint8_t LoRa_peek();
void LoRa_receive(uint8_t size);
void LoRa_idle();
void LoRa_sleep();
void LoRa_setTxPower(uint8_t level, uint8_t outputPin);
void LoRa_setTxPowerMax(uint8_t level);
void LoRa_setFrequency(uint32_t frequency);
void LoRa_setSpreadingFactor(uint8_t sf);
void LoRa_setSignalBandwidth(uint32_t sbw);
void LoRa_setCodingRate(uint8_t denominator);
void LoRa_setPreambleLength(uint16_t length);
void LoRa_setSyncWord(uint8_t sw);
void LoRa_enableCrc();
void LoRa_disableCrc();
uint8_t LoRa_random();
void LoRa_dumpRegisters();
void LoRa_explicitHeaderMode();
void LoRa_implicitHeaderMode();
void LoRa_handleDio0Rise();
void LoRa_handleDio1Rise();
void onReceiveCallback(uint8_t packetLength);

#endif /* INC_LORA_H_ */
